Field of the Invention
The present invention relates to integrating epitaxial, metallic transition metal nitride layers within a compound semiconductor device structure.
Description of the Prior Art
The ability to incorporate an epitaxial metal within a semiconductor device structure has been of interest because of the wide range of applications that can benefit from such a unique structure due to the lower resistivity of metals compared to semiconductors, and the additional degree of freedom in band structure engineering compared to exclusively semiconductor-based heterostructures. Potential applications can include buried ohmic or Schottky contacts, interconnects, antennas, or ground planes. The epitaxial metal may also be used as a traditional surface ohmic or Schottky contact, which may provide enhanced electrical characteristics and reliability compared to traditional polycrystalline metal contacts. The ability to replace a highly doped n- or p-type semiconductor with a metal can be used to reduce series resistance in devices where the highly doped n- or p-type layer's primary function is to provide a low resistance path for the lateral transport of charge, and the high conductivity of the metal can reduce the depletion width at junctions. The band structure of metals can be utilized in unique heterostructure designs for electronic and optoelectronic devices through the formation of metal quantum wells for devices such as a metal-base transistor, resonant tunneling diode or transistor, or photon detector including those based on inter-subband transitions. The optical properties of metals such as reflectivity could be used as a buried mirror or cladding layer for optoelectronic devices. Additionally, buried metals may be used in novel plasmonic device structures. Multiple buried metal layers may be used depending on the application, i.e. to create metal/semiconductor superlattices.
The ability to incorporate an epitaxial metal layer within a semiconductor structure requires proper selection of a metal that is compatible with the adjacent semiconductor(s). The metal and semiconductor(s) must have a similar crystal structure and in-plane lattice constant to reduce defect formation at the metal/semiconductor interface and within overlying layers. Furthermore, the metal must be thermodynamically stable with the adjacent semiconductor(s) to prevent material intermixing and enable the formation of sharp metal/semiconductor interfaces. Finally, the metal must be able to be grown on the semiconductor (and the semiconductor on the metal) in a fashion that allows for smooth, continuous film coverage, i.e. 2D or planar layer-by-layer growth without agglomeration. Ideally the metal and semiconductor layers should be deposited in situ in order to maintain the integrity and composition of the material surfaces and interfaces.
Formation of epitaxial metal layers to numerous technologically relevant semiconductor material systems have been reported, including Si (U.S. Pat. No. 4,492,971 to Bean et al. (Jan. 8, 1985) and U.S. Pat. No. 5,010,037 to Lin et al. (Apr. 23, 1991)), Group III-As (U.S. Pat. No. 3,929,527 to Chang et al. (Dec. 30, 1975), U.S. Pat. No. 5,075,755 to Sands (Dec. 24, 1991), and Palmstrom et al., “Epitaxial growth of ErAs on (100) GaAs,” Applied Physics Letters 35, 2608-2610 (1988)), and Group III-Sb (U.S. Pat. No. 5,449,561 to Golding et al. (Sep. 12, 1995)). Few reports of an epitaxial metal layer have been reported for SiC or III-Ns. These semiconductors are used in a variety of electronic and optoelectronic applications including high power electronics, high frequency transistors, light-emitting diodes, and lasers. The growth of III-N semiconductors is also commonly performed on SiC substrates due to the close lattice match and excellent thermal conductivity of SiC. The ability to incorporate metal layers in these semiconductors would increase current device performance and open up new avenues of device design.
A few methods have been reported for growing III-N materials on top of metals; however, these methods do not meet the criteria for forming epitaxial metal/semiconductor heterostructures. For example, AlN is commonly sputtered onto metal electrodes, such as Al, to fabricate acoustic resonators (U.S. Pat. No. 4,502,932 to Kline et al. (Mar. 5, 1985)). The AlN in this case is sputtered and contains many grain boundaries and is not suitable for many electronic applications. Liu and colleagues reported on the epitaxial growth of aluminum on GaN in 1997 (Liu et al., “Epitaxy of Al films on GaN studied by reflection high-energy electron diffraction and atomic force microscopy,” Applied Physics Letters 70, 990 (1997)). Due to the low melting point of Al, the epitaxy was performed at 15° C. or 150° C.—temperatures far too low for high-quality semiconductor overgrowth. In another method, a Pt layer is deposited on a sapphire substrate followed by the growth of GaN or AN deposited by metalorganic vapor phase epitaxy (MOVPE) (U.S. Pat. No. 6,239,005 to Sumiya et al. (May 29, 2001)). Due to the different crystal structures between Pt and GaN, a thick GaN buffer layer is required in order to obtain the crystal quality needed for operation of the intended optoelectronic device. This precludes this method from being applied to many semiconductor device concepts, particularly forming metal quantum wells. Additionally, it has been predicted that Pt and GaN are not in thermodynamic stability at 600° C. (Mohney et al., “Estimated phase equilibria in the transition metal-Ga—N systems: consequences for electrical contacts to GaN,” Journal of Electronic Materials 25, 812-817 (1996)), which is lower than typical growth and process temperatures for III-N materials and devices. A similar method utilizes a ZrN metal layer deposited by sputtering on a Si (111) substrate coated with a sputtered AlN layer (U.S. Patent Application US 2010/0176369 by Oliver et al. (Jul. 15, 2010)). Again, a thick GaN buffer layer is required to obtain device quality GaN due to the different crystal structures between ZrN (rocksalt) and GaN (wurtzite), creating defects at the interface and in the GaN. Similarly, HfN has been used as a buffer layer for growth of GaN on Si (111) (Xu et al., “Epitaxial condition and polarity in GaN grown on a HfN-buffered Si (111) wafer,” Applied Physics Letters 86, 182104 (2005) and U.S. Pat. No. 6,929,867 to Armitage et al. (Aug. 16, 2005)) and for HfN/GaN superlattices (U.S. Patent Application 2013/0048939 by Zhang et al. (Feb. 28, 2013)). Again, the HfN layer is rocksalt, and creates defects and inversion domains in the subsequently deposited semiconductor. Multilayers of metallic TiN and GaN have been deposited using reactive pulsed laser deposition (Rawat et al., “Growth of TiN/GaN metal semiconductor multilayers by reactive pulsed laser deposition,” Journal of Applied Physics 100, 064901 (2006)). In this case, TiN and GaN have different crystal structures, and while a superlattice was grown, the structure of the film was polycrystalline in nature with columnar grain growth, which is not suitable for many electronic and optoelectronic applications. In all cases above, the choice of metallic layer does not satisfy the aforementioned requirements for the formation of an epitaxial metal/semiconductor heterostructure. Recently there have been reports of epitaxial growth of GaN on metallic ZrB2. While GaN and ZrB2 have similar lattice constants and thermal conductivities, nucleation of GaN on ZrB2 is problematic due to the different chemical properties of the two materials (Armitage et al., “Characterization of ZrB2 (0001) surface prepared by ex situ HF solution treatment toward applications as a substrate for GaN growth,” Surface Science 600, 1439 (2006)), and control of the surface is critical because epitaxy will not occur if BN is present at the interface (Wang et al., “Effect of nitridation on the growth of GaN on ZrB2(0001)/Si(111) by molecular-beam epitaxy,” Journal of Applied Physics 100, 033506 (2006)).